1. Technical Field
The present disclosure refers to a buffer device to be placed between a switched capacitance user circuit and a source of an input signal.
2. Description of the Related Art
For the purposes of the present disclosure, “switched capacitance” circuit shall mean a circuit that includes at least one capacitor and that during its operation can switch between different configurations in which the capacitor is connected to different terminals.
As an example and not limitingly, for the user circuit a SAR (Successive Approximation Register) charge sharing A/D converter, similar to the one described in patent application WO-A-2003-007479, is considered, which uses two arrays of capacitors each suitable for being charged to store the voltage signal to be sampled and to then provide an output comparator.
In such a known converter, the charging of the input voltage (single-ended) VIN is carried out directly in a suitable initial fraction of the overall conversion time. At the end of the sampling step the comparator is activated. From this point onwards the input voltage VIN is stored (differentially) on the capacitive arrays and the digital output code can then be determined according to the algorithm of the successive approximations. In order to carry out a correct sampling of the input signal, the asymptotic setting in the node VIN (and of the summation nodes of the arrays) must be ensured in the time assigned to the charging step.
A problem that arises in the design of converters of this type concerns the fact that the external source that supplies the voltage to be converted influences the sampling step and can in turn be significantly influenced by it.
A first problematic situation occurs when the external source has a very high equivalent (purely resistive) impedance. The constant charging time of the capacitive array is determined by the capacitance of the array itself, by the input impedance of the reset comparator, and by the equivalent impedance of the voltage to be converted.
As the conversion speed increases (and therefore as the time allocated to conversion decreases, with consequent more or less proportional reduction in the time allocated to charging the input signal) and as the resolution increases (which leads to an increase in the capacitance of the arrays) the equivalent resistance of the generator of the voltage to be converted can become the limiting factor in ensuring the correct asymptotic bond of the sampling step. At the least a gain error in the result of the conversion comes from this.
The problem of dependency of the conversion upon the equivalent model of the source is even more sensitive if one considers the (fairly frequent) case in which such a model can be described by a series resistance and by a capacitance to ground. When, at the start of the sampling step, the analogue-digital converter is connected to the input, there is a charge-sharing effect between the capacitance of the source and the capacitance of the converter. The input voltage of the converter is instantly perturbed. From this moment up to the end of the sampling step (when the voltage to be subsequently converted will be stored), the voltage at the input of the converter attempts to recover its asymptotic value with a constant time dependent upon the parameters mentioned previously, to which must be added the capacitance of the source. For sufficiently high resistance and capacitance values of the source, in the time assigned to the charging of the input signal, the voltage stored in the converter and the input voltage may not have reached their asymptotic value.
Often, the SAR analogue-digital converters are required to carry out measurement functions (General Purpose ADC). To limit the effects of the noise (of the converter itself and of the system), many successive measurements are made and the result is averaged. If the time that passes between two conversion requests is less than the time necessary for the input signal to recover its asymptotic value, the second conversion will sample a different signal to the one expected. The effect of such a situation is that of producing as a result of the average of the conversions, a value dependent upon the conversion request frequency, upon the number of conversions to be averaged, upon the values of the parameters of the equivalent model of the input signal, and upon the input equivalent of the converter itself.
It should also be kept in mind that the perturbation carried on the input signal could be particularly undesirable should such a signal also be used by other circuits (and not just be measured).
Therefore, the general application problem has been set of making a reader of a voltage signal capable of offering an equivalent impedance that is as ideal as possible (infinite resistance and zero switched capacitance).
A known solution is to make a (direct) voltage buffer with a closed loop operational amplifier. The buffer can always remain connected to the input signal offering an input capacitance that can be somewhat limited by adopting suitable architectures for the operational element.
This solution does nevertheless have some drawbacks, which can be clearly seen in the application considered previously. A first problem occurs in the case in which the analogue-digital converter must manage the conversion of many different input signals. In such a situation either many buffers are foreseen (one for each input) or else, by switching the input of the operational element from one signal to another, the capacitance equivalently seen in transition from the input is very high (also because such an operational element shall be designed with suitable offset and noise requirements) and dependent, through the polarization of the operational element, upon the voltage levels between which the switching of the input occurs.
Moreover, when there is an input range of the type [0 . . . VINMAX], there is the difficulty of obtaining an operational element capable of ensuring the linearity of the transfer over the entire range of variability of the signal (for example up to 0V). It should also be considered that in the case in which there is a single input and the buffer is always kept connected, at the start-up of the converter the input capacitance of the buffer is very high and must be charged at the input voltage, perturbing the signal source.
The problems presented by use of the buffer under voltage have been tackled, at least in the literature, by proposing the use of a device that comprises, in addition to the buffer under voltage, also a capacitive component intended to be connected to the source to be charged at the input voltage and, at a second moment, to be connected to the buffer so as to transfer the input voltage itself onto its output.